Glossary
A
- API (Application Programming Interface)
A set of functions and protocols that allow applications to interact with the QuantumRT kernel.
- ARM Cortex-M
A family of 32-bit RISC processors designed for embedded and real-time applications.
C
- Context Switching
The process of saving and restoring thread states when switching execution between threads.
- CPU Core
The processing unit of a microcontroller responsible for executing instructions.
D
- Deferred Interrupt Handling
A mechanism that postpones certain operations from an ISR to a safer execution context, ensuring minimal ISR latency.
- Deterministic Execution
The property of a kernel where thread execution timing is predictable and guaranteed within a defined time frame.
F
- FIFO (First-In-First-Out)
A queueing method where items are processed in the same order they were added, commonly used in message queues.
- Floating-Point Unit (FPU)
A hardware module that performs floating-point arithmetic operations.
I
- Idle Thread
A low-priority thread that runs when no other threads are ready to execute, often used for power-saving.
- Interrupt Service Routine (ISR)
A subroutine that executes in response to hardware or software interrupts.
- Interrupt Latency
The time between when an interrupt is triggered and when the ISR begins execution.
- Inter-thread Communication
Methods used for exchanging data between threads, such as message queues and semaphores.
K
- Kernel
The core component of QuantumRT that manages thread execution, memory protection, and system resources.
M
- Memory Protection Unit (MPU)
A hardware component that enforces memory access restrictions for different execution contexts.
- Message Queue
A data structure that allows asynchronous communication between threads in a FIFO manner.
- Mutex (Mutual Exclusion)
A synchronization primitive ensuring only one thread can access a shared resource at a time.
N
- NVIC (Nested Vectored Interrupt Controller)
The ARM Cortex-M hardware module responsible for interrupt handling and priority management.
P
- PendSV (Pendable Service Call)
A system exception used for context switching in preemptive scheduling.
- Precise Scheduling
A scheduling mechanism in QuantumRT that dynamically loads the System Timer with the next event deadline instead of relying on periodic ticks.
- Preemptive Scheduling
A scheduling strategy where higher-priority threads can interrupt lower-priority threads.
- Priority Ceiling Protocol
A priority-inversion mitigation technique that temporarily raises the priority of a thread holding a mutex.
- Priority Inheritance Protocol
A mechanism that prevents priority inversion by temporarily raising a lower-priority thread’s priority when it holds a resource needed by a higher-priority thread.
- Privileged Mode
An execution level in ARM Cortex-M processors that grants full access to system memory, peripherals, and kernel functions.
R
- RAM (Random Access Memory)
The primary volatile memory where threads and system data are stored and executed.
- Real-Time Kernel
The core software responsible for managing thread execution in a real-time system.
- Round-Robin Scheduling
A scheduling algorithm that cycles through threads of equal priority, assigning each a fixed time slice.
S
- Scheduler
The kernel component responsible for selecting the next thread to execute.
- Semaphore
A synchronization primitive used for signaling between threads or controlling access to shared resources.
- Supervisor Call (SVC)
A software interrupt that allows unprivileged and privileged threads to request kernel services.
- System Timer
A dedicated hardware timer used for scheduling and timekeeping in a Real-Time Kernel.
T
- Thread
The basic unit of execution in QuantumRT, consisting of its own stack and execution state.
- Thread Synchronization
Methods ensuring that multiple threads operate without conflicts when sharing resources.
- Tick-Based Scheduling
A traditional scheduling approach where tasks are managed based on periodic timer ticks.
- Timeout
A predefined duration after which a blocked thread gives up waiting for an event.
- Time Slice
The fixed time duration a thread is allowed to execute before being preempted in a round-robin scheduler.
U
- Unprivileged Mode
A restricted execution mode where thread access to system resources is controlled by the MPU.
- System Call Extension
A mechanism that allows applications to invoke custom System Calls.
W
- Wake-Up Event
An event that moves a blocked thread to the ready state, allowing it to resume execution.